HPE Unveils Demonstration Chip Designed to Bolster Optical Computation Process Speeds

Hewlett Packard Enterprise has developed a demonstration chip designed to speed up optical computation processes as part of a Defense Advanced Research Projects Agency program that aims to develop communication, sensing, and computation technologies using mesoscale characteristics, IEEE reported Monday.

Rachel Courtland writes the company’s Hewlett Packard Labs business developed the chip, which was created via the Mesodynamic Architecture program, as an implementation of the Ising machine computation approach.

Ising machines are designed to find the best solution to problems that involve large numbers of competing alternatives.

Dave Kielpinski, senior research scientist at Hewlett Packard Labs, said the chip project aims to address the limits of photonic chip design and the HPE team will investigate designs that could help further develop such demonstration chips.

The report noted that the future Ising chips may help accelerate machines in a similar manner as graphics processing units.

Check Also

B-52 Stratofortress

Lockheed Puts Hypersonic Weapon Through Captive-Carry Flight Test

Lockheed Martin completed a captive-carry test of a second hypersonic weapon prototype on the U.S. Air Force's B-52 Stratofortress bomber aircraft Saturday off the Southern California coast.

AWACS aircraft

Boeing to Update Air Force Early-Warning Aircraft’s Comm Tech

Boeing has secured a six-year, $50M contract to update the U.S. Air Force's airborne warning and control system with an internet protocol-based communication technology.

Black River Systems

Black River to Continue Counter-Drone Tech Dev’t Under $89M USAF Contract Modification

Black River Systems has been awarded an $89.3M contract modification by the U.S. Air Force to continue working on an open systems architecture for counter-small unmanned aircraft systems.